True/False Indicate whether the
statement is true or false.
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1.
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A fully buffered DIMM uses an advanced buffering technique that makes it
possible for servers to support a large number of DIMMs.
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2.
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Newer DRAM memory types operate asynchronously.
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3.
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Synchronous memory retrieves data faster than asynchronous memory.
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4.
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ECC memory is more reliable than non-ECC memory.
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5.
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A parity error rarely causes the system to halt.
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Multiple Choice Identify the
choice that best completes the statement or answers the question.
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6.
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SIMMs have a ____ data path.
a. | 4-bit | c. | 32-bit | b. | 16-bit | d. | 64-bit |
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7.
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DIMM technologies have a ____ data path.
a. | 4-bit | c. | 32-bit | b. | 16-bit | d. | 64-bit |
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8.
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____ EDO is a refined version of EDO.
a. | Burst | c. | Dual | b. | Flash | d. | Synchronous |
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9.
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SDRAM has ____ notch(es).
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10.
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SDRAM uses ____ pins.
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11.
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DDR SDRAM has ____ notch(es).
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12.
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DDR SDRAM uses ____ pins.
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13.
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DDR2 SDRAM has a ____-pin DIMM.
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14.
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With ____, the memory controller can communicate with two DIMMs at the same
time, effectively doubling the speed of memory access.
a. | dual registers | c. | dual channels | b. | serial registers | d. | serial channels |
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15.
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If a slot does not hold a RIMM, it must hold a placeholder module called a ____
to ensure continuity throughout all slots.
a. | S-RIMM | c. | RIMM2 | b. | C-RIMM | d. | RIMMX |
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16.
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A ____ is an area on the motherboard that holds the minimum number of memory
chips or memory modules that must work together as a unit.
a. | pool | c. | bank | b. | bundle | d. | farm |
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17.
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The use of a parity bit means that every byte occupies ____ bit(s).
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18.
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Today’s memory uses a new method of error checking called ____ that can
detect and correct an error in a single bit.
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19.
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____ Latency and ____ Latency are two ways of measuring speed.
a. | BEDO, RAS | c. | BEDO, GPF | b. | CAS, RAS | d. | EDO, ECC |
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20.
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SDRAM, DDR, DDR2, and RIMM are measured in ____.
a. | MHz | c. | CAS Latency | b. | PC rating | d. | RAS Latency |
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21.
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A ____ is a measure of the total bandwidth of data moving between the module and
the CPU.
a. | MHz | c. | CAS Latency | b. | PC rating | d. | RAS Latency |
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22.
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On older motherboards, 30-pin SIMMs are installed in groups of ____.
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23.
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A DIMM slot can hold ____ bank(s).
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24.
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When looking at an advertisement for DIMMS, ____ of the module indicate(s) the
width of the data bus.
a. | size | c. | density | b. | weight | d. | rings |
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25.
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For RIMM modules, install the RIMMs beginning with bank ____.
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26.
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DDR2 SDRAM has a ____-bit data path.
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Completion Complete each
statement.
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27.
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If a memory module doesn’t support registers or buffers, it is always
referred to as a(n) ____________________ DIMM.
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28.
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____________________ refers to an error-checking procedure in which either every
byte has an even number of ones or every byte has an odd number of ones.
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29.
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To upgrade memory means to add more ____________________ to a computer.
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30.
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Stamped on each chip of a RAM module is a(n) ____________________ that
identifies the date the chip was manufactured.
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31.
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In Windows, memory errors can cause frequent ______________________________
errors.
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Matching
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Identify the letter of the choice that best matches the phrase or
definition. a. | DRAM | f. | C-RIMM | b. | SIMM | g. | DIMM | c. | PC
rating | h. | EDO | d. | memory | i. | SDRAM | e. | concurrent
RDRAM |
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32.
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Temporarily holds data and instructions as the CPU processes them
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33.
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Always stored in either DIMM, RIMM, or SIMM modules
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34.
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Has independent pins on opposite sides of the module
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35.
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Has pins on both sides of the module; each pin pair is tied together into a
single contact
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36.
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The first DIMM to run synchronized with the system clock
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37.
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An earlier version of Rambus memory
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38.
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A measure of the total bandwidth of data moving between the module and the
CPU
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39.
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Refined version of FPM that speeds up access time
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40.
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A placeholder module; contains no memory chips
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